1. Field of the Invention
Embodiments of the present invention relate to the design of switches. More specifically, embodiments of the present invention relate to the design of multi-chip switches that use proximity communication.
2. Related Art
Large switches with hundreds of ports that support high throughput require scalable architectures. Unfortunately, switch designers have struggled to create an architecture that can scale to meet the bandwidth demands of a typical large switch.
Smaller switches are typically constructed using crossbars, which provide matrices of cross points that selectively transfer cells from N inputs to N outputs. While attractive for relatively small switches, crossbars do not scale well to large switches because the number of cross points grows quadratically with the number of ports. Furthermore, the task of scheduling transfers through a crossbar can be difficult.
To reduce the difficulty of scheduling a crossbar, some designers have suggested using a buffered crossbar switch that adds buffers to every cross-point in the crossbar. Unfortunately, this approach does not scale well because of the large amount of memory required to place buffers in every cross-point.
To reduce the number of cross-points which are required for a crossbar, some designers have proposed using multi-stage switches. For example, Clos networks are a commonly used multi-stage architecture. The non-blocking variant of the Clos network allows for the conflict-free transferring of cells from any unmatched input to any unmatched output through the switch. However, because of its multi-stage design, the non-blocking Clos network requires very high connectivity.
Some designers have suggested using so-called blocking architectures because such switches are less complex than non-blocking switches. Unfortunately, blocking architectures create difficulties with routing and flow control across multiple stages. For example, head-of-line (HOL) blocking can arise when cells arriving at the same input port are destined for different output ports.
Another approach is to use a load-balanced switch, which simplifies the scheduling problem by distributing the switching across three stages. The first stage evenly distributes cells among second stage queues, which then forward cells to destination output ports in the third stage. This solution scales better than other solutions but suffers from high latency, out-of-order delivery of cells, doubled switching capacity, and difficulties with adding and removing line cards from the switch.
Some switch designers have considered optical switches as an alternative to electrical switches. Optical switches can transfer packets at high enough rates to avoid many of the scalability issues that hamper electrical switches. However, due to their cost and complexity, designers have not been able to produce a practical implementation of an optical switch.
Hence, what is needed is a switch which does not suffer from the above-described problems.